For many years, power-device discussions focused mainly on the silicon: lower resistance, higher voltage capability and faster switching. Today, packaging is becoming equally important because system performance is increasingly limited by electrical parasitics, thermal density and mechanical integration.
Why older packages become limiting
Traditional leaded power packages remain useful, but their long leads and larger current loops introduce resistance and inductance.
At modest switching speed this may be acceptable. At higher current and faster edge rates, however, package parasitics can contribute to:
- conduction loss;
- voltage overshoot;
- ringing;
- slower switching control;
- EMI;
- uneven current sharing in parallel devices.
As semiconductor dies improve, these package effects become a larger fraction of the total system limitation.
TOLL: compact, low-inductance power connection
TOLL, or TO-Leadless, removes the long leads associated with traditional TO-style packages and places the power terminals directly onto large metal pads.
Potential advantages include:
- lower package resistance;
- lower source and drain inductance;
- smaller PCB footprint;
- higher current capability for a given board area;
- improved high-frequency behaviour.
The package also suits automated surface-mount assembly, which can simplify high-volume production.
Why TOLT changes the thermal path
TOLT extends the leadless concept by supporting top-side cooling.
Instead of forcing most of the heat through the PCB, the package can transfer heat upward into a thermal interface, heat spreader, chassis or cold plate.
This provides designers with another degree of freedom. In compact converters, the PCB may already be crowded with magnetics, capacitors and copper current paths. Using the top of the MOSFET as a controlled thermal interface can reduce dependence on PCB area as the primary heatsink.
Electrical and thermal benefits reinforce each other
A lower-inductance package can enable cleaner switching. Cleaner switching can allow tighter control of overshoot and possibly reduce snubber loss.
At the same time, a stronger thermal path can keep junction temperature lower. Lower junction temperature generally reduces MOSFET channel resistance, which lowers conduction loss.
Packaging therefore affects efficiency through both electrical and thermal mechanisms.
Mechanical design now matters earlier
Top-side cooling changes the design process because the electrical and mechanical teams must coordinate earlier.
Important considerations include:
- package height tolerance;
- thermal-interface material thickness;
- clamping pressure;
- flatness of the heat spreader;
- isolation requirements;
- creepage and clearance;
- differential thermal expansion.
The heatsink can no longer be treated as something added after the PCB is finished.
Parallel devices and current sharing
High-power designs often use MOSFETs in parallel. Lower package and interconnect resistance can improve efficiency, but symmetrical PCB routing remains essential.
Differences in source inductance or drain-path resistance can make one device switch faster or carry more dynamic current than another.
Packages with Kelvin-source options can help separate the driver reference from the main power-current path and improve switching consistency.
When advanced packages provide the most value
TOLL, TOLT and related low-parasitic packages are particularly attractive where designers are pushing one or more of the following:
- high current;
- high switching frequency;
- compact board area;
- tight thermal limits;
- high power density;
- low profile;
- aggressive efficiency targets.
They are not automatically the best choice for every product. Cost, manufacturing capability, repairability, insulation structure and mechanical complexity all remain part of the decision.
A broader trend in power electronics
As power density increases, the distinction between device design, package design, PCB layout and cooling design becomes less clear.
The MOSFET is no longer just a silicon die with three terminals. It is part of an electrical and thermal system whose package can determine how much of the silicon's theoretical performance is actually usable.
That is why modern power-package development is moving toward shorter current paths, lower inductance, better thermal interfaces and more direct integration with the system's cooling structure.
