Power Design Insights

Fundamentals

Understanding MOSFET Losses: RDS(on) Is Only Part of the Story

A system view of MOSFET loss — conduction, switching, gate-drive, output-capacitance and reverse-recovery effects.

Intermediate 9 min read
MOSFET LOSS = A BALANCELowest RDS(on) does not always mean lowest system loss.Pcond ≈ Irms² × RDS(on)Psw ≈ Esw × fswGate + Coss + QrrPtotalchanges with V, I, f, TConduction dominates some designs; switching dominates others.

RDS(on) is the specification most designers notice first because it maps directly to conduction loss. But once switching frequency rises, the lowest-resistance MOSFET is not automatically the most efficient MOSFET.

The device loses energy in several different ways, and the dominant mechanism changes with current, voltage, switching frequency, temperature, topology and gate drive.

A useful mental model is:

Ptotal ≈ Pcond + Psw + Pgate + Pcap + Precovery + parasitic losses

The job is not to minimize one term. It is to minimize the total.

1. Conduction loss: where RDS(on) matters most

When the MOSFET is fully enhanced, its channel behaves approximately like a resistance:

Pcond ≈ Irms² × RDS(on)

This square-law dependence on current explains why a few milliohms matter greatly in battery systems, synchronous rectifiers, motor drives and other low-voltage/high-current applications.

However, the datasheet value is not a constant.

RDS(on) depends on:

  • junction temperature;
  • gate-source voltage;
  • device process and die size.

As temperature rises, channel resistance normally rises too. That means conduction loss and temperature reinforce each other.

For meaningful calculations, use the expected hot resistance, not only the 25°C headline value.

2. Switching loss: voltage and current overlap

A MOSFET is most efficient when it is either fully off or fully on. During a switching transition, it briefly supports substantial drain voltage while carrying substantial current.

That overlap creates energy loss.

A practical first-order expression is:

Psw ≈ Esw × fsw

or, for rough intuition in a hard-switched transition:

Esw ∝ VDS × ID × tsw

The faster the converter switches, the more often that energy is dissipated.

This creates one of the basic power-electronics trade-offs:

  • higher frequency can reduce magnetics size and improve transient response;
  • but higher frequency makes switching loss and gate-drive loss more important.

Two MOSFETs with the same RDS(on) can therefore have very different efficiency because of differences in Qgd, Coss, switching speed and package inductance.

3. Gate-drive loss: the gate is capacitive, not free

The MOSFET gate does not consume significant DC current once charged, but it has to be charged and discharged every switching cycle.

A useful estimate is:

Pgate ≈ Qg × Vgate × fsw

Most of this power is dissipated in the gate driver and gate resistance rather than in the MOSFET channel, but it remains part of system loss.

For example, doubling switching frequency approximately doubles gate-drive power if Qg and gate voltage remain unchanged.

The driver also affects switching time. A gate driver that is too weak can lengthen the Miller plateau and increase drain-voltage/current overlap.

4. Why a larger die can become a trade-off

A larger MOSFET die often produces lower RDS(on). That is attractive for conduction loss.

But larger die area can also increase:

  • total gate charge Qg;
  • gate-drain charge Qgd;
  • input capacitance;
  • output capacitance Coss.

So a device that wins at low frequency can lose at high frequency.

This is the reason designers use figures of merit instead of comparing resistance alone. Depending on the topology, useful combinations may include:

RDS(on) × Qg

or

RDS(on) × Qgd

These are not universal ranking numbers, but they expose the resistance-versus-switching trade-off.

5. Output capacitance stores real energy

The MOSFET's output capacitance is often represented by Coss. Whenever the drain voltage changes, energy is stored or released.

A simplified capacitor relationship is:

Ecap ≈ 1/2 × C × V²

In a hard-switched topology, part of this energy can be dissipated each cycle. Because the relationship depends strongly on voltage, Coss becomes especially important as bus voltage rises.

Real MOSFET capacitance is voltage-dependent, so datasheet energy curves such as Eoss can be more useful than a single small-signal capacitance number.

Soft-switching and resonant topologies are attractive partly because they can reduce the amount of capacitive energy dissipated during switching.

6. Reverse recovery can punish the opposite switch

In half bridges and synchronous rectifiers, current can flow through the MOSFET body diode during dead time.

When the circuit commutates, stored charge in that diode can create a reverse-recovery current pulse.

The penalty can appear as:

  • extra turn-on loss in the opposing MOSFET;
  • higher peak current;
  • drain-voltage overshoot;
  • ringing and EMI;
  • additional heating.

That is why Qrr and diode behaviour matter even when the MOSFET channel itself is the intended conduction path.

7. Dead time has its own efficiency optimum

Dead time is deliberately inserted between complementary switches to prevent shoot-through.

Too little dead time risks both MOSFETs being on together.

Too much dead time forces load current through a body diode for longer, increasing forward-drop and reverse-recovery losses.

The optimum is therefore not “maximum dead time for safety.” It is enough dead time to avoid cross-conduction, but no more than necessary.

Modern controllers often provide adaptive or programmable timing for exactly this reason.

Which loss dominates?

The answer changes with the application.

Operating conditionLosses likely to matter most
Low voltage, very high currentConduction and package resistance
High switching frequencySwitching, gate charge, Coss
High bus voltageSwitching and output-capacitance energy
Half bridge / synchronous rectificationDead time and reverse recovery
High temperatureConduction loss from increased RDS(on)

This is why an MOSFET optimized for one application can be mediocre in another.

A useful design loop

For a new design:

  1. estimate conduction loss at operating temperature;
  2. estimate switching energy at the intended voltage/current;
  3. include gate-drive power;
  4. consider Coss, body-diode and reverse-recovery behaviour;
  5. include package and PCB parasitic losses;
  6. calculate temperature rise;
  7. update the loss estimate using the hotter RDS(on);
  8. verify with switching waveforms and temperature measurement on hardware.

The iteration matters because electrical loss and temperature are coupled.

Key takeaway

RDS(on) is essential, but it is only one part of MOSFET efficiency.

At low switching frequency, conduction can dominate. At high frequency or high voltage, switching energy, gate charge, output capacitance and reverse recovery can become just as important.

The most efficient MOSFET is therefore the one that minimizes total system loss under the actual operating conditions, not the one with the lowest resistance in a comparison table.

Engineering note: The examples and relationships discussed here are general design guidance. Always verify device ratings, thermal limits, switching conditions and qualification requirements against the relevant datasheet and the actual operating environment.